1. Technical Field
Embodiments of the invention relate to power transistor drive circuits, and, in particular, to power transistor drive circuits that drive power transistors in accordance with certain temperature-current characteristics when the power transistor is turned on.
2. Related Art
A gated power device such as an insulated gate bipolar transistor (IGBT) or a power MOSFET is used in a semiconductor power converter, and there is a method of configuring a drive circuit for driving the power device as an inverter. Problems occurring when driving are the generation of loss and noise and the temperature characteristics when turning on.
In FIG. 5, a p-channel field effect transistor (P-FET) 52 and an n-channel field effect transistor (N-FET) 55 are connected in series to each other. The source of the P-FET 52 is connected to a power source voltage Vcc, and the drain of the P-FET 52 is connected to the drain of the N-FET 55. The source of the N-FET 55 is connected to a GND.
The source of a P-FET 54 is connected to the power source voltage Vcc, and the gate of the P-FET 54 is connected to the drain of the P-FET 54.
The P-FET 52 forms a current mirror circuit with the P-FET 54. An N-FET 58 and resistor 60 connected to the drain of the P-FET 54 are connected in series to each other, and one end of the resistor 60 is connected to the GND.
The output of an operational amplifier 59 is connected to the gate of the N-FET 58, the inverting input terminal of the operational amplifier 59 is connected to the source of the N-FET 58, and a reference voltage VREF set inside a drive circuit is input into the non-inverting input terminal of the operational amplifier 59.
The source of a P-FET 53 is connected to the Vcc, the drain of the P-FET 53 is connected to the drains of the P-FETs 52 and 54, and the gate of the P-FET 53 is connected to the output of a level shift circuit 57. A drive signal is input into the input of the level shift circuit 57 and a buffer 56. The level shift circuit 57 is used to regulate the voltage of the P-FET 53. An output from the buffer 56 is input into the gate of the N-FET 55, and the N-FET 55 is turned on, as a result of which the gate of an IGBT 51 is connected to the GND.
With respect to this configuration, for example, Japanese Patent Application JP-A-2008-103895 describes an advantage wherein it is possible to turn on the IGBT 51 while amplifying a constant current set by a resistance value in the drive circuit and the reference voltage, because of which it is possible, when turning on, to suppress noise and loss at a room temperature, as well as suppressing noise and loss when the temperature is high.
Also, Japanese Patent Application JP-A-2003-124796 describes a temperature compensation circuit such that a change in complementary output does not become imbalanced by utilizing a current having positive temperature characteristics and a current having negative temperature characteristics.
Further, when a constant current on the primary side of the current mirror in FIG. 5 is taken to be Io, and the resistance value of the resistor 60 is taken to be Rref, the current Io can be found from the relationship between the two, using the following expression (1).Io=VREF/Rref   (1)
Normally, in an intelligent power module (IPM), a power device such as the IGBT 51 and the drive circuit are mounted on the same module, and the operating temperature of the power module becomes high (in the order of about 150° C.). As a result, in the drive circuit in the vicinity of the power module, the temperature of the drive circuit also rises when the temperature of the power module is high, and the operating resistances of field effect transistors increase.
A decrease in turn-on drive capability when the temperature is high should have therefore been taken into consideration, as described in Japanese Patent Application JP-A-2008-103895. In recent years, however, there has been a wide range of use of the IPM, and there has been a need to take into account a low environmental temperature (about −20° C.) too, but there exists no power transistor drive circuit designed with that much thought.
Particularly with the heretofore known circuit shown in FIG. 5, the effect of suppressing noise and loss can be hoped for owing to an improvement in turn-on drive capability when the temperature of the power module is high, but as the operating resistances of the FETs and IGBT decrease conversely when the temperature is low, there is a problem in that noise and loss increases.
Japanese Patent Application JP-A-2003-124796 is an invention relating to an improvement in turn-on drive capability regardless of the temperature, and does not describe that noise and loss are suppressed.
Thus, as is described above, there are certain shortcomings in the art of power transistor drive circuits.